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19-1398; Rev 2; 8/99
L MANUA ION KIT ALUAT DATA SHEET EV WS FOLLO
Upstream CATV Amplifier
Features
o Ultra-Low Power-Up/Down Transients, 7mV Typical at 59dBmV Output o Single +5V Supply o Output Level Ranges from <8dBmV to 64dBmV o Gain Programmable in 1dB Steps o Low Transmit Output Noise Floor: -47dBmV (160kHz BW) o Low Transmit-Disable Output Noise: -70dBmV o Two Power-Down Modes
General Description
The MAX3510 is a programmable power amplifier for use in CATV upstream applications. The device outputs up to 64dBmV (continuous wave) through a 2:1 (voltage ratio) transformer. It features variable gain controlled by a 3-wire digital serial bus. Gain control is available in 1dB steps. The device operates over a frequency range of 5MHz to 65MHz. The MAX3510 offers a transmit-disable mode, which places the device in a high-isolation state for use between bursts in TDMA systems. In this mode the output stage is shut off, minimizing output noise. When entering and leaving transmit-disable mode, transients are kept to 7mV nominal at full gain. In addition, supply current is reduced to 25mA. Two power-down modes are available. Software-shutdown mode permits power-down of all analog circuitry while maintaining the programmed gain setting. Shutdown mode disables all circuitry and reduces current consumption to less than 10A. The MAX3510 is available in a 20-pin QSOP package for the extended-industrial temperature range (-40C to +85C).
MAX3510
Ordering Information
PART MAX3510EEP TEMP. RANGE -40C to +85C PIN-PACKAGE 20 QSOP
Applications
Cable Modems CATV Set-Top Box Telephony over Cable CATV Status Monitor
Pin Configuration appears at end of data sheet.
Typical Operating Circuit
12 CONTROL LOGIC 0.001F + 5 VIN+ VOUT+ INPUT ANTI-ALIAS FILTER 16 SHDN 18 TXEN VCC2 CEXT1 GND2 20 19 17 0.0033F 2:1 OUTPUT +5V 0.1F +5V
MAX3510
- +5V 0.1F 6 0.001F 2 4 3 7 1 VINVCC1 GND1 GND GND GND VOUT-
15 0.1F 0.1F
CEXT2 N.C. GND SCLK SDA CS
14 13 11 10 9 8 CONTROL LOGIC
________________________________________________________________ Maxim Integrated Products
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Upstream CATV Amplifier MAX3510
ABSOLUTE MAXIMUM RATINGS
VCC (VCC1, VCC2), VOUT+, VOUT- ................... -0.5V to +10.0V Input Voltage Levels (all inputs), CEXT1, CEXT2.........................................-0.3V to (VCC + 0.3V) Continuous Input Voltage (VIN+, VIN-)...............................2Vp-p Continuous Current (VOUT+, VOUT-).................................80mA Continuous Power Dissipation (TA = +70C) 20-Pin QSOP (derate at 12.3mW/C above +70C)....1067mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +165C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, TA = -40C to +85C, unless otherwise noted. No input signal applied. Typical parameters are at TA = +25C.) PARAMETER Supply Voltage Supply Current Transmit Mode Supply Current Transmit-Disable Mode Supply Current SoftwareShutdown Mode Supply Current Shutdown Mode Input High Voltage Input Low Voltage Input High Current Input Low Current SYMBOL VCC ICC ICC ICC ICC VINH VINL IBIASH IBIASL -100 TXEN = low TXEN = low, D7 = 0 SHDN = low, TXEN = low 2.0 0.8 100 CONDITIONS MIN 4.75 109 26 1.4 1 TYP MAX 5.25 126 30 2.0 10 UNITS V mA mA mA A V V A A
AC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, VIN = 34dBmV differential, output impedance = 75 through a 2:1 transformer, TA = -40C to +85C, unless otherwise noted. Typical parameters are at TA = +25C.) PARAMETER SYMBOL CONDITIONS Gain control word = 1, TA = -40C to +85C fIN = 5MHz to 42MHz Voltage Gain AV Gain control word = 63, TA = 0C to +85C Gain control word = 63, TA = -40C to 0C fIN = 10MHz Bandwidth Gain Rolloff 1dB Compression Point P1dB f3dB Gain control word = 50, TA = -40C to +85C 27 dB 26 16.7 84 100 -0.9 -1.6 20.0 1 1 -1 -1.8 20.4 MHz dB dBm 1.3 dB 0.65 1.3 MIN TYP MAX -26 UNITS
VOUT = 60dBmV, -3dB (Note 1) VOUT = 60dBmV, fIN = 42MHz (Notes 1, 2) VOUT = 60dBmV, fIN = 65MHz (Notes 1, 2) AV = 26dB, 42MHz (Note 1) AV = -26dB to +27dB, TA = -40C to +85C AV = -26dB to +26dB, TA = -40C to 0C
18.0 0.7
Output Step Size
fIN = 5MHz to 42MHz
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Upstream CATV Amplifier
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, VIN = 34dBmV differential, output impedance = 75 through a 2:1 transformer, TA = -40C to +85C, unless otherwise noted. Typical parameters are at TA = +25C.) PARAMETER Transmit Mode Noise Transmit-Disable Mode Noise Floor Isolation in Transmit-Disable Mode TXEN Transient Duration TXEN Transient Step Size Input Impedance Output Impedance Output Return Loss in Transmit Mode Output Return Loss in Transmit-Disable Mode ZIN ZOUT RL fIN = 5MHz to 65MHz (Note 1) TXEN = low, fIN = 5MHz to 65MHz (Note 1) TA = 0C TA = +25C TA = +85C TA = 0C TA = +25C TA = +85C RL 8.0 8.7 8.9 7.1 7.7 9.7 SYMBOL CONDITIONS BW = 160kHz, AV = 26dB (Note 1) BW = 160kHz, AV = -26dB (Note 1) TXEN = low, BW = 160kHz, AV = +26dB, fIN = 5MHz to 65MHz (Note 1) TXEN low, gain control word = 61, fIN = 65MHz TXEN rise/fall time < 0.1s, TA = +25C (Note 1) Gain = 26dB, TA = +25C (Note 1) Gain = 2dB or lower, TA = +25C (Note 1) fIN = 5MHz to 65MHz, single-ended, TA = +25C (Note 1) 1.4 36 45 3.2 7 0.7 1.5 75 13.5 13.5 13.9 12.0 12.2 12.7 -56 -53 dBc Input tones at 65MHz and 65.2MHz, VIN = 28dBmV/tone, VOUT = 53dBmV/tone, TA = +25C (Note 1) fIN = 33MHz, TA = -40C to +85C VOUT = +54dBmV VOUT = +59dBmV -54 -59 -55 -54 -58 -54 -49 0.1 1 -51 -53 -50 -50 -53 -50 -44 dB degrees dBc dBc dBc dB dB 5 37 3.7 47 MIN TYP MAX -78 -46 -70 UNITS dBc dBmV dBmV dB s mVp-p k
MAX3510
Input tones at 40MHz and 40.2MHz, VIN = 28dBmV/tone, VOUT = +54dBmV/tone, TA = +25C (Note 1) Two-Tone Third-Order Distortion IM3
2nd Harmonic Distortion
HD2
fIN = 65MHz, VOUT = +59dBmV, TA = +25C (Note 1) fIN = 22MHz, TA = -40C to +85C VOUT = +54dBmV VOUT = +59dBmV
3rd Harmonic Distortion
HD3
fIN = 65MHz, VOUT = +59dBmV, TA = +25C (Note 1) AM to AM AM to PM AM/AM AM/PM AV = 26dB, VIN swept from 34dBmV to 38dBmV (Note 1) AV = 26dB, VIN swept from 34dBmV to 38dBmV (Note 1)
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Upstream CATV Amplifier MAX3510
TIMING CHARACTERISTICS
(VCC = +4.75V to +5.25V, TXEN = SHDN = high, D7 = 1, TA = +25C, unless otherwise noted.) PARAMETER CS to SCK Rise Setup Time CS to SCK Rise Hold Time SDA to SCK Setup Time SDA to SCK Hold Time SDA Pulse Width High SDA Pulse Width Low SCK Pulse Width High SCK Pulse Width Low SYMBOL tSENS tSENH tSDAS tSDAH tDATAH tDATAL tSCKH tSCKL COMMENT MIN 10 20 10 20 50 50 50 50 TYP MAX UNITS ns ns ns ns ns ns ns ns
Note 1: Guaranteed by design and characterization. Note 2: Reference to 5MHz.
Typical Operating Characteristics
(VCC = +5V, VIN = +34dBmV, TXEN = SHDN = high, fIN = 20MHz, ZLOAD = 75 through a 2:1 transformer, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX3510 toc01
VOLTAGE GAIN vs. SUPPLY VOLTAGE (GAIN STATE = 33)
-40C 1.6 VOLTAGE GAIN (dB) 0C 1.2
MAX3510 toc02
VOLTAGE GAIN vs. SUPPLY VOLTAGE (GAIN STATE = 60)
MAX3510 toc03
112
2.0
26.8
110 SUPPLY CURRENT (mA)
VCC = 5.25V
VOLTAGE GAIN (dB)
108 VCC = 4.75V 106
-40C
0.8 +25C 0.4 +85C
+25C
+85C
104
102 -50 -25 0 25 50 75 100 TEMPERATURE (C)
0 4.75 4.8 4.85 4.9 4.95 5.0 5.05 5.1 5.15 5.2 5.25 SUPPLY VOLTAGE (V)
26.6 4.75 4.8 4.85 4.9 4.95 5.0 5.05 5.1 5.15 5.2 5.25 SUPPLY VOLTAGE (V)
VOLTAGE GAIN vs. TEMPERATURE (GAIN STATE = 33)
MAX3510 toc04
VOLTAGE GAIN vs. FREQUENCY
30 20 VOLTAGE GAIN (dB) 10 0 -10 -20 -30 -40 D E F G GAIN CONTROL WORD: A = 63 C = 48 E = 24 G = 6 B = 57 D = 36 F = 12 1 10 100 1000 FREQUENCY (MHz) A B C
MAX3510 toc05
VOLTAGE GAIN vs. GAIN CONTROL WORD
30 20 VOLTAGE GAIN (dB) 10 0 -10 -20 -30 -40 0 6 12 18 24 30 36 42 48 54 60 GAIN CONTROL WORD (DECIMAL) f = 40MHz f = 5MHz
MAX3510 toc06
1.6 1.4 1.2 VOLTAGE GAIN (dB) 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 5.25V 4.75V 5.0V
40
40
-50 -60 100 TEMPERATURE (C)
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Upstream CATV Amplifier MAX3510
Typical Operating Characteristics (continued)
(VCC = +5V, VIN = +34dBmV, TXEN = SHDN = high, fIN = 20MHz, ZLOAD = 75 through a 2:1 transformer, TA = +25C, unless
otherwise noted.)
VOLTAGE GAIN vs. GAIN CONTROL WORD
MAX3510 toc07
GAIN STEP vs. GAIN CONTROL WORD
MAX3510 toc08
30 28 26 VOLTAGE GAIN (dB) 24 f = 5MHz 22 20 18 f = 60MHz f = 40MHz
OUTPUT IMPEDANCE (75 REFERENCE)
MAX3510 toc10
1.25
1.15 GAIN STEP (dB)
5MHz
1.05 TRANSMIT-DISABLE MODE 0.95 TRANSMIT MODE
0.85 16 14 48 50 52 54 56 58 60 62 64 GAIN CONTROL WORD (DECIMAL) 0.75 0 6 12 18 24 30 36 42 48 54 60 GAIN CONTROL WORD (DECIMAL)
65MHz
OUTPUT RETURN LOSS vs. FREQUENCY
MAX3510 toc11
TRANSMIT OUTPUT NOISE vs. GAIN
MAX3510 toc12
POWER-UP/POWER-DOWN TRANSIENTS vs. OUTPUT LEVEL
MAX3510 toc13
0
-20 OUTPUT NOISE (dBmV IN 160kHz) -25 -30 -35 -40 -45 -50
100
TRANSIENT LEVEL (mVp-p)
4 RETURN LOSS (dB) TRANSMIT MODE TRANSMIT-DISABLE MODE
10
8
12
1
16
20 5 15 25 35 45 55 65 75 85 95 105 FREQUENCY (MHz)
0.1 -33 -27 -21 -15 -9 -3 3 9 15 21 27 0 10 20 30 40 50 60 GAIN (dB) OUTPUT LEVEL (dBmV)
2nd HARMONIC DISTORTION vs. INPUT FREQUENCY AND OUTPUT LEVEL
MAX3510 toc14
3rd HARMONIC DISTORTION vs. INPUT FREQUENCY
-40 -45 -50 -55 -60 -65 -70 -75 VOUT = 48dBmV VOUT = 24dBmV VOUT = 6dBmV VOUT = 60dBmV VOUT = 54dBmV
MAX3510 toc15
-40 2nd HARMONIC DISTORTION (dBc) -45 -50 -55 -60 -65 -70 -75 -80 0 10 20 30 40 50 60 VOUT = 6dBmV VOUT = 30dBmV VOUT = 60dBmV VOUT = 57dBmV
-35 3rd HARMONIC DISTORTION (dBc)
70
0
10
20
30
40
50
60
70
FREQUENCY (MHz)
INPUT FREQUENCY (MHz)
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Upstream CATV Amplifier MAX3510
Table 1. Reflection Coefficients (75 reference)
FREQUENCY MHz 1 2 5 10 20 30 40 60 80 120 160 200 TRANSMIT MODE REAL S11 0.937 0.937 0.936 0.932 0.932 0.932 0.927 0.922 0.913 0.889 0.850 0.753 IMAG S11 -0.006 -0.007 -0.005 -0.011 -0.018 -0.026 -0.033 -0.054 -0.075 -0.145 -0.249 -0.408 TRANSMIT MODE REAL S22 -0.494 -0.054 0.196 0.183 0.143 0.108 0.059 -0.060 -0.197 -0.420 -0.442 -0.212 IMAG S22 0.625 0.550 0.199 0.017 -0.081 -0.149 -0.199 -0.257 -0.252 -0.070 0.256 0.543 TRANSMIT DISABLE MODE REAL S22 -0.509 -0.075 0.219 0.244 0.219 0.194 0.158 0.066 -0.049 -0.281 -0.409 -0.327 IMAG S22 0.623 0.577 0.257 0.062 -0.052 -0.121 -0.175 -0.252 -0.284 -0.207 0.037 0.345
Pin Description
PIN 1, 3, 7, 11 2 4 5 6 8 9 10 12 13 14 15 16 17 18 19 20 NAME GND VCC1 GND1 VIN+ VINCS SDA SCLK SHDN N.C. CEXT2 VOUTVOUT+ CEXT1 TXEN VCC2 GND2 Ground Pins Programmable-Gain Amplifier (PGA) +5V Supply. Bypass this pin to GND1 with a decoupling capacitor as close to the part as possible. PGA RF Ground. As with all ground connections, maintain the shortest possible (low-inductance) length to the ground plane. Positive PGA Input. Along with VIN-, this port forms a high-impedance differential input to the PGA. Driving this port differentially will increase the rejection of second-order distortion at low output levels. Negative PGA Input. When not used, this port must be AC-coupled to ground. See VIN+. Serial-Interface Enable. TTL-compatible input. See Serial Interface section. Serial-Interface Data. TTL-compatible input. See Serial Interface section. Serial-Interface Clock. TTL-compatible input. See Serial Interface section. Shutdown. When this pin and TXEN (pin 18) are set low, all functions (including the serial interface) are disabled, leaving only leakage currents to flow. No Connection RF Output Bypass. This pin must be bypassed to ground with a 0.1F capacitor. Negative Output. Along with VOUT+, this port forms a 300 impedance output. This port is matched to a 75 load using a 2:1 transformer. Positive Output. See VOUT-. Transmit-Disable (Enable) Timing Capacitor. See Ramp Generator section. Power-Amplifier Enable. Setting this pin low shuts off the power amplifier. Power Amplifier Bias, +5V Supply. Bypass this pin to GND2 with a decoupling capacitor as close to the part as possible. Power Amplifier Bias Ground. As with all ground connections, maintain the shortest possible (low inductance) length to the ground plane. FUNCTION
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Upstream CATV Amplifier MAX3510
VOUT-
SHDN VCC1
PGA BIAS CELL
MAX3510
CEXT2
VOUT+ VIN+
VINPOWER AMP BIAS
VCC2 TXEN
D/A CONVERTER SERIAL DATA INTERFACE CS SDA SCLK
RAMP GENERATOR
CEXT1
Figure 1. Functional Diagram
Detailed Description
The following sections describe the blocks shown in the functional diagram (Figure 1).
Power Amplifier
The power amplifier is a Class A differential amplifier capable of driving +64dBmV differentially. This architecture provides superior even-order distortion performance but requires that a transformer be used to convert to a single-ended output. In transmit-disable mode, the power amplifier is shut off. An internal resistor is placed across the output, so that the output impedance remains matched when the amplifier is in transmit-disable mode. Disabling the output devices also allows the lowest standby noise. To achieve the proper load line, the output impedance of the power amplifier is 300 differential. To match this output impedance to a 75 load, the transformer must have a turns ratio (voltage ratio) of 2:1 (4:1 impedance ratio). The differential amplifier is biased directly from the +5V supply using the center tap of the output transformer. This provides a significant benefit when switching between transmit mode and transmit-disable mode. Stored energy due to bias currents will cancel within the transformer and prevent switching transients from reaching the load.
Programmable-Gain Amplifier
The programmable-gain amplifier (PGA) consists of the variable-gain amplifier (VGA) and the digital-to-analog converter (DAC), which provide better than 52dB of output level control in 1dB steps. The PGA is implemented as a programmable Gilbertcell attenuator. It uses a differential architecture to achieve maximum linearity. The gain of the PGA is determined by a 6-bit word (D5-D0) programmed through the serial data interface (Tables 2 and 3). Specified performance is achieved when the input is driven differentially. The device may be driven singleended; however, a slight increase in even-order distortion may result at low output levels. To drive the device in this manner, one of the input pins must be capacitively coupled to ground. Use a capacitor value large enough to allow for a low-impedance path to ground at the lowest frequency of operation. For operation down to 5MHz, a 0.001F capacitor is suggested.
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Upstream CATV Amplifier MAX3510
Ramp Generator
The ramp generator circuit is a simple RC charging circuit, which is used to control power-up and power-down of the output power amplifier. It is made up of CEXT1 and an internal 2k resistor. The choice of CEXT1 is governed by the period of the burst on/off cycle. CEXT1 must be small enough to fully charge/discharge within a burst. A typical value of CEXT1 is 0.0033F. tions are disabled in this mode and current consumption is reduced to under 2mA.
Serial Interface
The serial interface has an active-low enable (CS) to bracket the data, with data clocked in MSB first on the rising edge of SCLK. Data is stored in the storage latch on the rising edge of CS. The serial interface controls the state of the PGA. Tables 2 and 3 show the register format. Serial-interface timing is shown in Figure 2.
Shutdown Mode In normal operation the shutdown pin (SHDN) is held high. When SHDN and TXEN are taken low, all circuits within the IC are disabled. Only leakage currents flow in this state. Data stored within the serial-data interface latches will be lost upon entering this mode. Current draw is reduced to 1A (typ) in shutdown mode.
A
G
B
C
D
E
F
PGA Bias Cell
The PGA bias cell is accessed by the SHDN pin. When this pin is taken low, the programmable-gain amplifier and serial data interface are shut off. Note that any gain setting stored in the serial data interface latch will be lost. The power amplifier is unaffected by the PGA Bias cell, therefore TXEN must be held low to be in shutdown mode. This mode lowers supply current draw to less than 1A typical.
D7
D6 A. tSENS B. tSDAS C. tSDAH D. tSCKL
D5
D4
D3
D2
D1
D0
Power Amp Bias Cell
The power amp bias cell is used to enable and disable bias to the output differential pair. This is controlled by the TXEN pin (18).
E. tSCKH F. tSENH G. tDATAH/tDATAL
Figure 2. Serial-Interface Timing Diagram
Functional Modes
The MAX3510 has four functional modes controlled through the serial interface or external pins (Table 3): transmit mode, transmit-disable mode, software-shutdown mode, and shutdown mode.
Table 2. Serial-Interface Control Word
BIT MSB 7 6 5 4 3 2 1 LSB 0 MNEMONIC D7 D6 D5 D4 D3 D2 D1 D0 DESCRIPTION Software Shutdown Test Bit Gain Control, Bit 5 Gain Control, Bit 4 Gain Control, Bit 3 Gain Control, Bit 2 Gain Control, Bit 1 Gain Control, Bit 0
Transmit Mode Transmit mode is the normal active mode of the MAX3510. The TXEN pin must be held high in this mode. Note that SHDN must also be held high. Transmit-Disable Mode When in transmit-disable mode, the power amplifier is completely shut off. This mode is activated by taking TXEN low while keeping SHDN high. This mode is typically used between bursts in TDMA systems. Transients are controlled by the action of the transformer balance. Software-Shutdown Mode Software-shutdown mode is enabled when D7 = 0 and TXEN is low. This mode minimizes current consumption while maintaining the programmed gain state stored in the latch of the serial-data interface. All analog func8
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Upstream CATV Amplifier
Table 3. Chip-State Control Bits
SHDN 0 1 1 1 1 1 1 1 1 1 1 TXEN 0 0 0 1 1 1 1 1 1 1 1 D7 X 0 1 1 1 1 1 1 1 1 1 D6 X X X X X X X X X X X D5 X X X X 0 0 -- 1 -- 1 1 D4 X X X X 0 0 -- 0 -- 1 1 D3 X X X X 0 0 -- 0 -- 1 1 D2 X X X X 0 0 -- 0 -- 1 1 D1 X X X X 0 0 -- 0 -- 1 1 D0 X X X X 0 1 -- 0 -- 0 1 GAIN STATE (DECIMAL) X X X X 0 1 -- 32 -- 62 63 STATE Shutdown Mode Software-Shutdown Mode Transmit-Disable Mode Transmit Mode Gain = -32dB* Gain = -31dB* -- Gain = 0dB* -- Gain = 29dB* Gain = 30dB*
MAX3510
*Typical gain at +25C and VCC = +5V
Applications Information
Output Match
The MAX3510's output circuit is an open-collector differential amplifier. An on-chip resistor across the collectors provides a nominal output impedance of 300 in transmit mode and transmit disable mode.
adequate primary inductance must be present to sustain low-frequency output capability as temperatures drop. In general this will not be a problem, as modern RF transformers have adequate bandwidth.
Input Circuit
To achieve rated performance, the input of the MAX3510 must be driven differentially with an appropriate input level. The differential input impedance is approximately 1.5k. Most applications will require a differential lowpass filter preceding the device. The filter design will dictate terminating impedance of a specified value. Place this load impedance across the AC-coupled input pins (see Typical Operating Circuit). The MAX3510 has sufficient gain to produce an output level of 60dBmV (CW through a 2:1 transformer) when driven with a 34dBmV input signal. Rated performance is achieved with this input level. When a lower input level is present, the maximum output level will be reduced proportionally and output linearity will increase. If an input level greater than 34dBmV is used, the 3rd-order distortion performance will degrade slightly. If a single-ended source drives the MAX3510, one of the input terminals must be capacitively coupled to ground (VIN+ or VIN-). The value of this capacitor must be large enough to look like a short circuit at the lowest frequency of interest. For operation at 5MHz with a 75 source impedance, a value of 0.1F will suffice.
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Transformer
To match the output of the MAX3510 to a 75 load, a 2:1 (voltage ratio) transformer is required. This transformer must have adequate bandwidth to cover the intended application. Note that most RF transformers specify bandwidth with a 50 source on the primary and a matching resistance on the secondary winding. Operating in a 75 system will tend to shift the low-frequency edge of the transformer bandwidth specification up by a factor of 1.5, due to primary inductance. Keep this in mind when specifying a transformer. Bias to the output stage is provided through the center tap on the transformer primary. This greatly diminishes the on/off transients present at the output when switching between transmit and transmit-disable modes. Commercially available transformers typically have adequate balance between half-windings to achieve substantial transient cancellation. Finally, keep in mind that transformer core inductance varies proportionally with temperature. If the application requires low temperature extremes (less than 0C),
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Upstream CATV Amplifier
Power-Supply Layout For minimal coupling between different sections of the IC, the ideal power-supply layout is a star configuration. This configuration has a large-value decoupling capacitor at the central power-supply node. The power-supply traces branch out from this node, each going to a separate power-supply node in the MAX3510 circuit. At the end of each of these traces is a decoupling capacitor that provides a very low impedance at the frequency of interest. This arrangement provides local powersupply decoupling at each power-supply pin. The power supply traces must be made as thick as practical to keep resistance well below 1. Ground inductance degrades distortion performance. Therefore, ground plane connections to GND1 and GND2 should be made with multiple vias if possible.
MAX3510
VIN+
2k
1.1pF
VIN-
Figure 3. Equivalent Input Circuit
The model for the MAX3510 input impedance is shown in Figure 3.
Layout Issues
A well-designed printed circuit board is an essential part of an RF circuit. For best performance pay attention to power-supply layout issues as well the output circuit layout.
Output Circuit Layout The differential implementation of the MAX3510's output has the benefit of significantly reducing even-order distortion, the most significant of which is 2nd-harmonic distortion. The degree of distortion cancellation depends on the amplitude and phase balance of the overall circuit. It is critical that the traces that lead from the output pins be exactly the same length.
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Upstream CATV Amplifier
Pin Configuration
TRANSISTOR COUNT: 736
TOP VIEW
GND 1 VCC1 2 GND 3 GND1 4 VIN+ 5 VIN- 6 GND 7 CS 8 SDA 9 SCLK 10 20 GND2 19 VCC2 18 TXEN 17 CEXT1
Chip Information
MAX3510
MAX3510
16 VOUT+ 15 VOUT14 CEXT2 13 N.C. 12 SHDN 11 GND
QSOP
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Upstream CATV Amplifier MAX3510
Package Information
QSOP.EPS
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